The present invention relates to circuit designs and, more specifically, to a method of designing and a method of manufacturing a design structure reducing variation of parameters to improve parameter uniformity over the design.
As semiconductor devices continue to be scaled down in size, tolerance for dimensions is also reduced. In addition, total variation for many device components increases so that one device on a substrate may have very different properties than another device on the same substrate. As the number of levels of interconnecting conductors increases, smaller variations and more patterns are required to stay within the smaller tolerance. Imposing better controls results in more computational effort to enable design and manufacture of semiconductor devices to specifications. The use of “Dummy Fill” shapes has been useful toward reducing parameter variation, such as pattern density variation, in a design, and by reducing that parameter variation, device variations are also reduced, which improves yield and/or performance of the devices. There is a need for methods of dynamically determining the target parameter values, such as target pattern density, and of adjusting the parameter, such as by defining a Dummy Fill shape at any point of the chip, in more computationally efficient ways that still impose better controls and keep the resulting designs within tolerances.